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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Assembler syntax<br />

QADD {,} , <br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

The destination register.<br />

The first oper<strong>and</strong> register.<br />

The second oper<strong>and</strong> register.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations();<br />

(R[d], sat) = SignedSatQ(SInt(R[m]) + SInt(R[n]), 32);<br />

if sat then<br />

APSR.Q = ‘1’;<br />

Exceptions<br />

None.<br />

Instruction Details<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-251

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