ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Register
number
C6.3.1 Internal and external views of the DBGDSCR and the DCC registers
Debug Register Interfaces
1010 0xFC8 Read-only v7 only Debug Device ID Register (DBGDEVID) on
page C10-6.
1011 0xFCC Read-only v7 only Device Type Register (DBGDEVTYPE) on
page C10-98.
1012-1019 0xFD0-
0xFEC
1020-1023 0xFF0-
0xFFC
Table C6-2 Debug register map (continued)
Offset Access a Versions b Name and reference to description
Read-only v7 only Debug Peripheral Identification Registers (DBGPID0 to
DBGPID4) on page C10-98.
Read-only v7 only Debug Component Identification Registers (DBGCID0
to DBGCID3) on page C10-102.
a. For more information, see CP14 debug registers access permissions on page C6-36 and Permission summaries for
memory-mapped and external debug interfaces on page C6-45.
b. An entry of All in the Versions column indicates that the register is implemented in v6 Debug, v6.1 Debug, and
v7 Debug.
c. These registers are only implemented through the Baseline CP14 interface and do not have register numbers or offsets.
d. The method of accessing the DBGWFAR is different in v6 Debug, v6.1 Debug and v7 Debug. For details see
Watchpoint Fault Address Register (DBGWFAR) on page C10-28.
e. In v6 Debug and v6.1 Debug, ARM recommends these registers as part of the external debug interface, and are not
implemented through the Extended CP14 interface. In v7 Debug these registers are required.
f. Internal views of the DBGDTRRX, DBGDTRTX, and DBGDSCR are implemented through the Baseline CP14
interface. This is explained in Internal and external views of the DBGDSCR and the DCC registers.
For each of the three registers DBGDSCR, DBGDTRTX and DBGDTRRX there are two views, denoted by
int and ext suffixes. The differences between these aliases relate to the handling of the Debug
Communications Channel (DCC), and in particular the TXfull and RXfull status flags. The nomenclature
internal and external derives from the intended usage model.
Accesses to DBGDSCRint, DBGDTRRXint or DBGDTRTXint are always made through the Baseline
CP14 interface described in The Baseline CP14 debug register interface on page C6-32. DBGDSCRint is
read-only in v7 Debug.
Accesses to DBGDSCRext, DBGDTRRXext or DBGDTRTXext can be made through:
the Extended CP14 interface, if implemented
the memory-mapped interface, if implemented
the external debug interface.
However, if at any given time you attempt to access the DBGDSCRext, DBGDTRRXext and
DBGDTRTXext registers through more than one interface the behavior is UNPREDICTABLE. If an
implementation provides a single port to handle external debug interface and the memory-mapped interface
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. C6-21