ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

The System Level Programmers’ Model
B1.6.12 Supervisor Call (SVC) exception
The Supervisor Call instruction SVC enters Supervisor mode and requests a supervisor function. Typically,
the SVC instruction is used to request an operating system function. For more information, see SVC
(previously SWI) on page A8-430.
Note
In previous versions of the ARM architecture, the SVC instruction was called SWI, Software Interrupt.
The following pseudocode describes how this exception is taken:
// TakeSVCException()
// ==================
TakeSVCException()
// Determine return information. SPSR is to be the current CPSR, after changing the IT[]
// bits to give them the correct values for the following instruction, and LR is to be
// the current PC minus 2 for Thumb or 4 for ARM, to change the PC offsets of 4 or 8
// respectively from the address of the current instruction into the required address of
// the next instruction (the SVC instruction having size 2 or 4 bytes respectively).
ITAdvance();
new_lr_value = if CPSR.T == ‘1’ then PC-2 else PC-4;
new_spsr_value = CPSR;
// Enter Supervisor (‘10011’) mode, and ensure Secure state if initially in Monitor
// (‘10110’) mode. This affects the banked versions of various registers accessed later
// in the code.
if CPSR.M == ‘10110’ then SCR.NS = ‘0’;
CPSR.M = ‘10011’;
// Write return information to registers, and make further CPSR changes: IRQs disabled,
// IT state reset, instruction set and endianness to SCTLR-configured values.
SPSR[] = new_spsr_value;
R[14] = new_lr_value;
CPSR.I = ‘1’;
CPSR.IT = ‘00000000’;
CPSR.J = ‘0’; CPSR.T = SCTLR.TE; // TE=0: ARM, TE=1: Thumb
CPSR.E = SCTLR.EE; // EE=0: little-endian, EE=1: big-endian
// Branch to SVC vector.
BranchTo(ExcVectorBase() + 8);
The preferred exception return from an SVC exception is a return to the next instruction after the SVC
instruction. Use the LR and SPSR values generated by the exception entry to produce this return by using
an exception return instruction without a subtraction.
For more information, see Exception return on page B1-38.
B1-52 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B