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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.358 VQDMLAL, VQDMLSL<br />

Vector Saturating Doubling Multiply Accumulate Long multiplies corresponding elements in two<br />

doubleword vectors, doubles the products, <strong>and</strong> accumulates the results into the elements of a quadword<br />

vector.<br />

Vector Saturating Doubling Multiply Subtract Long multiplies corresponding elements in two doubleword<br />

vectors, subtracts double the products from corresponding elements of a quadword vector, <strong>and</strong> places the<br />

results in the same quadword vector.<br />

In both instructions, the second oper<strong>and</strong> can be a scalar instead of a vector. For more information about<br />

scalars see Advanced SIMD scalars on page A7-9.<br />

If any of the results overflow, they are saturated. The cumulative saturation flag, QC, is set if saturation<br />

occurs. For details see Pseudocode details of saturation on page A2-9.<br />

Encoding T1 / A1 Advanced SIMD<br />

VQD. ,,<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 0 1 1 1 1 1 D size Vn Vd 1 0 op 1 N 0 M 0 Vm<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 0 0 1 0 1 D size Vn Vd 1 0 op 1 N 0 M 0 Vm<br />

if size == ‘11’ then SEE “Related encodings”;<br />

if size == ‘00’ || Vd == ‘1’ then UNDEFINED;<br />

add = (op == ‘0’);<br />

scalar_form = FALSE; d = UInt(D:Vd); n = UInt(N:Vn); m = UInt(M:Vm);<br />

esize = 8

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