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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Thumb Instruction Set Encoding<br />

A6.3.10 Store single data item<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 1 0 0 0 op1 0 op2<br />

Table A6-21 show the allocation of encodings in this space. Other encodings in this space are UNDEFINED.<br />

These encodings are all available in <strong>ARM</strong>v6T2 <strong>and</strong> above.<br />

op1 op2 Instruction See<br />

Table A6-21 Store single data item<br />

100 - Store Register Byte STRB (immediate, Thumb) on page A8-388<br />

000 1xx1xx<br />

1100xx<br />

1110xx Store Register Byte Unprivileged STRBT on page A8-394<br />

0xxxxx Store Register Byte STRB (register) on page A8-392<br />

101 - Store Register Halfword STRH (immediate, Thumb) on page A8-408<br />

001 1xx1xx<br />

1100xx<br />

1110xx Store Register Halfword Unprivileged STRHT on page A8-414<br />

001 0xxxxx Store Register Halfword STRH (register) on page A8-412<br />

110 - Store Register (immediate) STR (immediate, Thumb) on page A8-382<br />

010 1xx1xx<br />

1100xx<br />

1110xx Store Register Unprivileged STRT on page A8-416<br />

0xxxxx Store Register (register) STR (register) on page A8-386<br />

A6-30 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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