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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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<strong>ARM</strong>v4 <strong>and</strong> <strong>ARM</strong>v5 Differences<br />

MRC p15,0,,c5,c0,1 ; Read CP15 Instruction Region Access Permissions Register<br />

MCR p15,0,,c5,c0,1 ; Write CP15 Instruction Region Access Permissions Register<br />

c5, Memory Region Extended Access Permissions Registers (DEAPR <strong>and</strong> IEAPR)<br />

The two Memory Region Extended Access Permissions Registers are:<br />

The Data or unified Extended Access Permissions Register, DEAPR.<br />

The Instruction Extended Access Permissions Register, IEAPR. The IEAPR is implemented only<br />

when the processor implements separate data <strong>and</strong> instruction memory protection region definitions.<br />

Whether an implementation includes Extended Access Permissions Registers is IMPLEMENTATION DEFINED.<br />

A Memory Region Extended Access Permissions Registers hold the access permission bits AP[3:0] for each<br />

of the eight memory protection regions.<br />

The format of a Memory Region Access Permissions Register is:<br />

31 28 27 24 23 20 19 16 15 12 11 8 7 4 3 0<br />

AP7 AP6 AP5 AP4 AP3 AP2 AP1 AP0<br />

APn, bits [4n+3:4n], for n = 0 to 7<br />

Access permission bits AP[3:0] for memory protection region n.<br />

For details of the significance of these bits see Table H-11 on page AppxH-29.<br />

If the implementation does not permit the requested type of access, it signals an abort to the processor.<br />

Accessing the Memory Region Extended Access Permissions Registers<br />

To access the Memory Region Extended Access Permissions Registers you read or write the CP15 registers<br />

with set to 0, set to c5, set to c0, <strong>and</strong> set as follows:<br />

2 if there is only a single set of protection regions<br />

when there are separate memory protection regions for data <strong>and</strong> instructions:<br />

— 2 to access the Data Region Extended Access Permissions Register<br />

— 3 to access the Instruction Region Extended Access Permissions Register.<br />

For example:<br />

MRC p15,0,,c5,c0,2 ; Read CP15 Data or unified Region Extended Access Permissions Register<br />

MCR p15,0,,c5,c0,2 ; Write CP15 Data or unified Region Extended Access Permissions Register<br />

MRC p15,0,,c5,c0,3 ; Read CP15 Instruction Region Extended Access Permissions Register<br />

MCR p15,0,,c5,c0,3 ; Write CP15 Instruction Region Extended Access Permissions Register<br />

AppxH-46 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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