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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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The Instruction Sets<br />

A4.11 Advanced SIMD <strong>and</strong> VFP load/store instructions<br />

Table A4-13 summarizes the extension register load/store instructions in the Advanced SIMD <strong>and</strong> VFP<br />

instruction sets.<br />

Advanced SIMD also provides instructions for loading <strong>and</strong> storing multiple elements, or structures of<br />

elements, see Element <strong>and</strong> structure load/store instructions on page A4-27.<br />

Instruction See Operation<br />

Table A4-13 Extension register load/store instructions<br />

Vector Load Multiple VLDM on page A8-626 Load 1-16 consecutive 64-bit registers (Adv. SIMD <strong>and</strong> VFP)<br />

Load 1-16 consecutive 32-bit registers (VFP only)<br />

Vector Load Register VLDR on page A8-628 Load one 64-bit register (Adv. SIMD <strong>and</strong> VFP)<br />

Load one 32-bit register (VFP only)<br />

Vector Store Multiple VSTM on page A8-784 Store 1-16 consecutive 64-bit registers (Adv. SIMD <strong>and</strong> VFP)<br />

Store 1-16 consecutive 32-bit registers (VFP only)<br />

Vector Store Register VSTR on page A8-786 Store one 64-bit register (Adv. SIMD <strong>and</strong> VFP)<br />

Store one 32-bit register (VFP only)<br />

A4-26 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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