ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARMv6 Differences
TCM access support registers are defined. See c9, TCM Non-Secure Access Control Registers,
DTCM-NSACR and ITCM-NSACR on page AppxG-51.
CP15 support for the Security Extensions in ARMv7 is defined in Effect of the Security Extensions on the
CP15 registers on page B3-71.
CP15SDISABLE input
The effect of this input is described for ARMv7 in The CP15SDISABLE input on page B3-76. In ARMv6K,
TCM support is affected as follows:
the DTCM_NSAC and ITM_NSAC registers are added to the controlled register list
any TCM region registers restricted to Secure access only by the NSACR register settings are added
to the controlled register list.
G.6.5 Protected Memory System Architecture (PMSA)
PMSA in ARMv5 is IMPLEMENTATION DEFINED. The method described in Protected memory support on
page AppxH-28 is only supported in ARMv4 and ARMv5. PMSA is formalized in ARMv6 under a different
CP15 support model.
The PMSA support in ARMv6 (PMSAv6) differs from PMSAv7 in the following ways:
PMSAv6 does not support subregions as defined in Subregions on page B4-3.
The default memory map shown in Table B4-1 on page B4-6 and Table B4-2 on page B4-7 does not
support the XN bit for restricting instruction fetches. The affected addresses are treated as Normal,
Non-cacheable in PMSAv6.
The default memory map applies only when the MPU is disabled. The SCTLR.BR bit is not
supported in PMSAv6.
TCM memory behaves as normal when the TCM region is enabled and the MPU is disabled.
In all other respects, PMSAv6 is as described for ARMv7 in Chapter B4 Protected Memory System
Architecture (PMSA).
Execute Never (XN)
The ARMv7 requirement that instruction prefetches are not made from read-sensitive devices also applies
to earlier versions of the architecture:
ARMv7 requires you to mark all read-sensitive devices with the Execute-never (XN) to ensure that
this requirement is met, see The Execute Never (XN) attribute and instruction prefetching on
page B3-30
before ARMv7, how this requirement is met is IMPLEMENTATION DEFINED.
AppxG-28 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B