ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

VFP HPFP, bits[27:24]
The CPUID Identification Scheme
Indicates whether the VFP supports half-precision floating-point conversion operations.
Permitted values are:
0b0000 Not supported.
0b0001 Supported.
A_SIMD HPFP, bits[23:20]
Indicates whether Advanced SIMD supports half-precision floating-point conversion
operations. Permitted values are:
0b0000 Not supported.
0b0001 Supported. This value is only permitted if the A_SIMD SPFP field is 0b0001.
A_SIMD SPFP, bits [19:16]
Indicates whether the Advanced SIMD extension supports single-precision floating-point
operations. Permitted values are:
0b0000 Not supported.
0b0001 Supported. This value is only permitted if the A_SIMD integer field is 0b0001.
A_SIMD integer, bits [15:12]
Indicates whether the Advanced SIMD extension supports integer operations. Permitted
values are:
0b0000 Not supported.
0b0001 Supported.
A_SIMD load/store, bits [11:8]
Indicates whether the Advanced SIMD extension supports load/store instructions. Permitted
values are:
0b0000 Not supported.
0b0001 Supported.
D_NaN mode, bits [7:4]
Indicates whether the VFP hardware implementation supports only the Default NaN mode.
Permitted values are:
0b0000 Hardware supports only the Default NaN mode. If a VFP subarchitecture is
implemented its support code might include support for propagation of NaN
values.
0b0001 Hardware supports propagation of NaN values.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. B5-39