ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Register In a Description, see
Register Index
DTCMRR, ARMv6 c9, TCM Region Registers (DTCMRR and ITCMRR) on page AppxG-47
DTLBIALL VMSA CP15 c8, TLB maintenance operations on page B3-138
DTLBIASID VMSA CP15 c8, TLB maintenance operations on page B3-138
DTLBIMVA VMSA CP15 c8, TLB maintenance operations on page B3-138
DTLBLR, pre-ARMv7 c10, VMSA TLB lockdown support on page AppxH-59
ENDIANSTATE ENDIANSTATE on page A2-19
Event The Event Register on page B1-46
Event Catch Event Catch Register (DBGECR) on page C10-78
Event Count c9, Event Count Register (PMXEVCNTR) on page C10-116
Event Counter Selection c9, Event Counter Selection Register (PMSELR) on page C10-113
Event Select c9, Event Type Select Register (PMXEVTYPER) on page C10-115
Extended Access Permissions,
pre-ARMv6
FAR See Fault Address
Table K-1 Register index (continued)
c5, Memory Region Extended Access Permissions Registers (DEAPR
and IEAPR) on page AppxH-46
Fault Address c6, Data Fault Address Register (DFAR) on page B4-57 (PMSA)
c6, Data Fault Address Register (DFAR) on page B3-124 (VMSA)
c6, Instruction Fault Address Register (IFAR) on page B4-58 (PMSA)
c6, Instruction Fault Address Register (IFAR) on page B3-125 (VMSA)
Watchpoint Fault Address Register (DBGWFAR) on page C10-28
c6, Watchpoint Fault Address Register (DBGWFAR) on page AppxG-37
(ARMv6)
Fault Status PMSA c5, Data Fault Status Register (DFSR) on page B4-55
c5, Instruction Fault Status Register (IFSR) on page B4-56
VMSA c5, Data Fault Status Register (DFSR) on page B3-121
c5, Instruction Fault Status Register (IFSR) on page B3-122
FCSE Process ID VMSA c13, FCSE Process ID Register (FCSEIDR) on page B3-152
FCSEIDR VMSA c13, FCSE Process ID Register (FCSEIDR) on page B3-152
Floating-point Exception The Floating-Point Exception Register (FPEXC) on page B1-68
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. AppxK-11