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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Each unit of the instruction is checked against the VCR <strong>and</strong> the BRPs. VCRMatch()<br />

// <strong>and</strong> BRPMatch() might return UNKNOWN for units other than the first unit of the<br />

// instruction, as in some cases the generation of Debug events is UNPREDICTABLE.<br />

for W = 0 to length-1<br />

vcr_match = VCRMatch(address, W == 0) || vcr_match;<br />

// This code does not take into account the case where a mismatch breakpoint<br />

// does not match the address of an instruction but another breakpoint or<br />

// vector catch does match the instruction. In that situation, generation of<br />

// the Debug event is UNPREDICTABLE.<br />

for N = 0 to UInt(DBGDIDR.BRPs)<br />

brp_match = BRPMatch(N, address, W == 0) || brp_match;<br />

address = address + step;<br />

Debug Events<br />

// A suitable debug event occurs if there has been a BRP match or a VCR match. If<br />

// both have occurred, just one debug event occurs, <strong>and</strong> its type is IMPLEMENTATION<br />

// DEFINED.<br />

if vcr_match || brp_match then<br />

if !vcr_match then BreakpointDebugEvent();<br />

elsif !brp_match then VectorCatchDebugEvent();<br />

else IMPLEMENTATION_DEFINED either BreakpointDebugEvent() or VectorCatchDebugEvent();<br />

return;<br />

// BRPMatch()<br />

// ==========<br />

boolean BRPMatch(integer N, bits(32) address, boolean first)<br />

assert N

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