ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Chapter C5
Debug State
This chapter describes Debug state, that is entered if a debug event occurs when the processor is configured
for Halting debug-mode. It contains the following sections:
About Debug state on page C5-2
Entering Debug state on page C5-3
Behavior of the PC and CPSR in Debug state on page C5-7
Executing instructions in Debug state on page C5-9
Privilege in Debug state on page C5-13
Behavior of non-invasive debug in Debug state on page C5-19
Exceptions in Debug state on page C5-20
Memory system behavior in Debug state on page C5-24
Leaving Debug state on page C5-28.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. C5-1