ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Pseudocode Index
UnsignedRecipEstimate() Unsigned fixed-point reciprocal estimate Reciprocal estimate and step on
page A2-58
UnsignedRSqrtEstimate() Unsigned fixed-point reciprocal square
root estimate
UnsignedSat() Convert integer to bitstring with
unsigned saturation
UnsignedSatQ() Convert integer to bitstring with
unsigned saturation, with saturated flag
output
VCR_OnTakingInterrupt() Track most recently used interrupt
vectors for vector catch purposes
VCRMatch() Check whether a vector catch occurs for
an instruction unit access
VCRVectorMatch() Check whether an instruction unit access
matches a vector
Reciprocal square root on
page A2-61
Pseudocode details of saturation on
page A2-9
Breakpoints and Vector Catches on
page C3-28
VectorCatchDebugEvent() Generate a debug event for a vector catch Debug events on page C3-27
VFPExcBarrier() Ensure all outstanding VFP exception
processing has occurred
VFPExpandImm() Expansion of immediates for VFP
extension instructions
VFPSmallRegisterBank() Returns TRUE if 16-doubleword VFP
extension register bank implemented
Table J-2 Pseudocode functions and procedures (continued)
Function Meaning See
Asynchronous bounces,
serialization, and VFP exception
barriers on page B1-70
Operation on page A7-25
Pseudocode details of Advanced
SIMD and VFP extension registers
on page A2-23
WaitForEvent() Wait until WFE instruction completes Pseudocode details of the Wait For
Event lock mechanism on
page B1-46
WaitForInterrupt() Wait until WFI instruction completes Pseudocode details of Wait For
Interrupt on page B1-48
WatchpointDebugEvent() Generate a debug event for a watchpoint Debug events on page C3-27
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. AppxJ-19