ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.105 MUL
Multiply multiplies two register values. The least significant 32 bits of the result are written to the
destination register. These 32 bits do not depend on whether the source register values are considered to be
signed values or unsigned values.
Optionally, it can update the condition flags based on the result. In the Thumb instruction set, this option is
limited to only a few forms of the instruction. Use of this option adversely affects performance on many
processor implementations.
Encoding T1 ARMv4T, ARMv5T*, ARMv6*, ARMv7
MULS ,, Outside IT block.
MUL ,, Inside IT block.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 1 0 0 0 0 1 1 0 1 Rn Rdm
d = UInt(Rdm); n = UInt(Rn); m = UInt(Rdm); setflags = !InITBlock();
if ArchVersion() < 6 && d == n then UNPREDICTABLE;
Encoding T2 ARMv6T2, ARMv7
MUL ,,
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 0 1 1 0 0 0 0 Rn 1 1 1 1 Rd 0 0 0 0 Rm
d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = FALSE;
if BadReg(d) || BadReg(n) || BadReg(m) then UNPREDICTABLE;
Encoding A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7
MUL{S} ,,
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 0 0 0 0 0 0 S Rd (0)(0)(0)(0) Rm 1 0 0 1 Rn
d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == ‘1’);
if d == 15 || n == 15 || m == 15 then UNPREDICTABLE;
if ArchVersion() < 6 && d == n then UNPREDICTABLE;
A8-212 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B