ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

A4.13.5 Advanced SIMD multiply instructions
Table A4-20 summarizes the Advanced SIMD multiply instructions.
Instruction See
Vector Multiply Accumulate
Vector Multiply Accumulate Long
Vector Multiply Subtract
Vector Multiply Subtract Long
Advanced SIMD multiply instructions can operate on vectors of:
8-bit, 16-bit, or 32-bit unsigned integers
8-bit, 16-bit, or 32-bit signed integers
8-bit or 16-bit polynomials over {0,1} (VMUL and VMULL only)
single-precision (32-bit) floating-point numbers.
They can also act on one vector and one scalar.
The Instruction Sets
Long instructions have doubleword (64-bit) operands, and produce quadword (128-bit) results. Other
Advanced SIMD multiply instructions can have either doubleword or quadword operands, and produce
results of the same size.
VFP multiply instructions can operate on:
single-precision (32-bit) floating-point numbers
double-precision (64-bit) floating-point numbers.
Some VFP implementations do not support double-precision numbers.
Table A4-20 Advanced SIMD multiply instructions
VMLA, VMLAL, VMLS, VMLSL (integer) on
page A8-634
VMLA, VMLS (floating-point) on page A8-636
VMLA, VMLAL, VMLS, VMLSL (by scalar) on
page A8-638
Vector Multiply VMUL, VMULL (integer and polynomial) on
page A8-662
Vector Multiply Long
VMUL (floating-point) on page A8-664
VMUL, VMULL (by scalar) on page A8-666
Vector Saturating Doubling Multiply Accumulate Long
Vector Saturating Doubling Multiply Subtract Long
VQDMLAL, VQDMLSL on page A8-702
Vector Saturating Doubling Multiply Returning High Half VQDMULH on page A8-704
Vector Saturating Rounding Doubling Multiply Returning
High Half
VQRDMULH on page A8-712
Vector Saturating Doubling Multiply Long VQDMULL on page A8-706
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