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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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A2.5.2 ITSTATE<br />

Application Level Programmers’ Model<br />

This field holds the If-Then execution state bits for the Thumb IT instruction. See IT on page A8-104 for a<br />

description of the IT instruction <strong>and</strong> the associated IT block.<br />

ITSTATE divides into two subfields:<br />

IT[7:5] Holds the base condition for the current IT block. The base condition is the top 3 bits of the<br />

condition specified by the IT instruction.<br />

This subfield is 0b000 when no IT block is active.<br />

IT[4:0] Encodes:<br />

The size of the IT block. This is the number of instructions that are to be conditionally<br />

executed. The size of the block is implied by the position of the least significant 1 in<br />

this field, as shown in Table A2-2 on page A2-18.<br />

The value of the least significant bit of the condition code for each instruction in the<br />

block.<br />

Note<br />

Changing the value of the least significant bit of a condition code from 0 to 1 has the<br />

effect of inverting the condition code.<br />

This subfield is 0b00000 when no IT block is active.<br />

When an IT instruction is executed, these bits are set according to the condition in the instruction, <strong>and</strong> the<br />

Then <strong>and</strong> Else (T <strong>and</strong> E) parameters in the instruction. For more information, see IT on page A8-104.<br />

An instruction in an IT block is conditional, see Conditional instructions on page A4-4 <strong>and</strong> Conditional<br />

execution on page A8-8. The condition used is the current value of IT[7:4]. When an instruction in an IT<br />

block completes its execution normally, ITSTATE is advanced to the next line of Table A2-2 on page A2-18.<br />

For details of what happens if such an instruction takes an exception see Exception entry on page B1-34.<br />

Note<br />

Instructions that can complete their normal execution by branching are only permitted in an IT block as its<br />

last instruction, <strong>and</strong> so always result in ITSTATE advancing to normal execution.<br />

Note<br />

7 6 5 4 3 2 1 0<br />

IT[7:0]<br />

ITSTATE affects instruction execution only in Thumb <strong>and</strong> ThumbEE states. In <strong>ARM</strong> <strong>and</strong> Jazelle states,<br />

ITSTATE must be '00000000', otherwise behavior is UNPREDICTABLE.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A2-17

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