ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Common Memory System Architecture Features
B2.4 Pseudocode details of general memory system operations
This section contains pseudocode describing general memory operations, in the subsections:
Memory data type definitions.
Basic memory accesses on page B2-30.
Interfaces to memory system specific pseudocode on page B2-30.
Aligned memory accesses on page B2-31
Unaligned memory accesses on page B2-32
Reverse endianness on page B2-34
Exclusive monitors operations on page B2-35
Access permission checking on page B2-37
Default memory access decode on page B2-37
Data Abort exception on page B2-39.
The pseudocode in this section applies to both VMSA and PMSA implementations. Additional pseudocode
for memory operations is given in:
Pseudocode details of VMSA memory system operations on page B3-156
Pseudocode details of PMSA memory system operations on page B4-79.
B2.4.1 Memory data type definitions
The following data type definitions are used by the memory system pseudocode functions:
// Types of memory
enumeration MemType {MemType_Normal, MemType_Device, MemType_StronglyOrdered};
// Memory attributes descriptor
type MemoryAttributes is (
MemType type,
bits(2) innerattrs, // ‘00’ = Non-cacheable; ‘01’ = WBWA; ‘10’ = WT; ‘11’ = WBnWA
bits(2) outerattrs, // ‘00’ = Non-cacheable; ‘01’ = WBWA; ‘10’ = WT; ‘11’ = WBnWA
boolean shareable,
boolean outershareable
)
// Physical address type, with extra bits used by some VMSA features
type FullAddress is (
bits(32) physicaladdress,
bits(8) physicaladdressext,
bit NS // ‘0’ = Secure, ‘1’ = Non-secure
)
// Descriptor used to access the underlying memory array
type AddressDescriptor is (
MemoryAttributes memattrs,
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. B2-29