ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.200 STRD (immediate)
Store Register Dual (immediate) calculates an address from a base register value and an immediate offset,
and stores two words from two registers to memory. It can use offset, post-indexed, or pre-indexed
addressing. For information about memory accesses see Memory accesses on page A8-13.
Encoding T1 ARMv6T2, ARMv7
STRD ,,[{,#+/-}]
STRD ,,[],#+/-
STRD ,,[,#+/-]!
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 0 1 0 0 P U 1 W 0 Rn Rt Rt2 imm8
if P == ‘0’ && W == ‘0’ then SEE “Related encodings”;
t = UInt(Rt); t2 = UInt(Rt2); n = UInt(Rn); imm32 = ZeroExtend(imm8:’00’, 32);
index = (P == ‘1’); add = (U == ‘1’); wback = (W == ‘1’);
if wback && (n == t || n == t2) then UNPREDICTABLE;
if n == 15 || BadReg(t) || BadReg(t2) then UNPREDICTABLE;
Encoding A1 ARMv5TE*, ARMv6*, ARMv7
STRD ,,[{,#+/-}]
STRD ,,[],#+/-
STRD ,,[,#+/-]!
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 0 0 P U 1 W 0 Rn Rt imm4H 1 1 1 1 imm4L
if Rt == ‘1’ then UNDEFINED;
t = UInt(Rt); t2 = t+1; n = UInt(Rn); imm32 = ZeroExtend(imm4H:imm4L, 32);
index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);
if P == ‘0’ && W == ‘1’ then UNPREDICTABLE;
if wback && (n == 15 || n == t || n == t2) then UNPREDICTABLE;
if t2 == 15 then UNPREDICTABLE;
Related encodings See Load/store dual, load/store exclusive, table branch on page A6-24
A8-396 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B