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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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VFP Vector Operation Support<br />

F.1 About VFP vector mode<br />

The single-precision registers can be used to hold short vectors of up to 8 single-precision values. Arithmetic<br />

operations on all the elements of such a vector can be specified by just one single-precision arithmetic<br />

instruction.<br />

Similarly, the double-precision registers can be used to hold short vectors of up to 4 double-precision values,<br />

<strong>and</strong> double-precision arithmetic instructions can specify operations on these vectors.<br />

A vector consists of 2-8 registers from a single bank. VFP register banks on page AppxF-5 describes the<br />

division of the VFP register set into banks.<br />

The FPSCR.LEN field controls the number of elements in a vector. The register number in the instruction<br />

specifies the register that contains the first element of the vector. The FPSCR.STRIDE field controls the<br />

increment between the register numbers of the elements of the vector. If the total increment causes the<br />

register number to overflow the top of a register bank, the register number wraps around to the bottom of<br />

the bank, as shown in VFP register banks on page AppxF-5.<br />

For details of the FPSCR.LEN <strong>and</strong> FPSCR.STRIDE fields see Vector length <strong>and</strong> stride control on<br />

page AppxF-3.<br />

A VFP instruction can operate on:<br />

oper<strong>and</strong> vectors with LEN elements, producing a result vector with LEN elements<br />

an oper<strong>and</strong> vector with LEN elements <strong>and</strong> a scalar oper<strong>and</strong>, producing a result vector with LEN<br />

elements<br />

scalar oper<strong>and</strong>s, producing a scalar result.<br />

These three operation types are identical if LEN == 1.<br />

To control which type of operation an instruction performs, you choose the registers for the instruction from<br />

different register banks. VFP instruction type selection on page AppxF-7 describes how to select the<br />

instruction type.<br />

F.1.1 Affected instructions<br />

The following VFP instructions are affected by VFP vector mode:<br />

VABS VADD VDIV VMLA VMLS<br />

VMOV (immediate) VMOV (register) VMUL VNEG VNMLA<br />

VNMLS VNMUL VSQRT VSUB<br />

All other VFP instructions behave as described in their instruction descriptions regardless of the values of<br />

FPSCR.LEN <strong>and</strong> FPSCR.STRIDE.<br />

AppxF-2 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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