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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Debug Registers <strong>Reference</strong><br />

Address range mask, bits [28:24], v7 Debug<br />

In v7 Debug, whether address range masking is supported is IMPLEMENTATION DEFINED. If<br />

it is not supported these bits are RAZ/WI.<br />

If address range masking is supported, this field can be used to break on a range of addresses<br />

by masking lower order address bits out of the breakpoint comparison. The value of this<br />

field is the number of low order bits of the address that are masked off, except that values of<br />

1 <strong>and</strong> 2 are reserved. Therefore, the meaning of Breakpoint address range mask values are:<br />

0b00000 No mask<br />

0b00001 Reserved<br />

0b00010 Reserved<br />

0b00011 0x00000007 mask for instruction address, three bits masked<br />

0b00100 0x0000000F mask for instruction address, four bits masked<br />

0b00101 0x0000001F mask for instruction address, five bits masked<br />

. .<br />

. .<br />

. .<br />

0b11111 0x7FFFFFFF mask for instruction address, 31 bits masked.<br />

This field must be programmed to 0b00000 if either:<br />

this BRP is programmed for Context ID comparison<br />

the Byte address select field is programmed to a value other than 0b1111.<br />

If this is not done, the generation of Breakpoint debug events is UNPREDICTABLE.<br />

If this field is not zero, the DBGBVR bits that are not included in the comparison must be<br />

zero, otherwise the generation of Breakpoint debug events is UNPREDICTABLE.<br />

For more information about the use of this field see Breakpoint address range masking<br />

behavior, v7 Debug on page C3-9.<br />

Bits [28:24], v6 Debug <strong>and</strong> v6.1 Debug<br />

Reserved, UNK/SBZP.<br />

DBGBVR meaning, bits [22:20]<br />

This field controls the behavior of Breakpoint debug event generation. This includes the<br />

meaning of the value held in the associated DBGBVR, whether it is an IVA or a Context ID.<br />

Each bit of this field has particular significance, <strong>and</strong> there can be restrictions on the values<br />

of bits [22:21]:<br />

Bit [22], Match or mismatch<br />

This bit is set to 1 for a mismatch comparison.<br />

This bit is not supported <strong>and</strong> is UNK/SBZP in v6 Debug.<br />

For more information about IVA mismatching see Additional considerations for<br />

IVA mismatch breakpoints on page C3-13.<br />

The Debug architecture does not support Context ID mismatch comparisons.<br />

C10-50 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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