ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Protected Memory System Architecture (PMSA)
The DFAR is:
a 32-bit read/write register
accessible only in privileged modes.
The format of the DFAR is:
31 0
Faulting address of synchronous Data Abort exception
For information about using the DFAR, including when the value in the DFAR is valid, see Fault Status and
Fault Address registers in a PMSA implementation on page B4-18.
A debugger can write to the DFAR to restore its value.
Accessing the DFAR
To access the DFAR you read or write the CP15 registers with set to 0, set to c6, set to
c0, and set to 0. For example:
MRC p15,0,,c6,c0,0 ; Read CP15 Data Fault Address Register
MCR p15,0,,c6,c0,0 ; Write CP15 Data Fault Address Register
c6, Instruction Fault Address Register (IFAR)
The Instruction Fault Address Register, IFAR, holds the address of the faulting access that caused a
synchronous Prefetch Abort exception.
The IFAR is:
a 32-bit read/write register
accessible only in privileged modes.
The format of the IFAR is:
31 0
Faulting address of synchronous Prefetch Abort exception
For information about using the IFAR, including when the value in the IFAR is valid, see Fault Status and
Fault Address registers in a PMSA implementation on page B4-18.
A debugger can write to the IFAR to restore its value.
Accessing the IFAR
To access the IFAR you read or write the CP15 registers with set to 0, set to c6, set to c0,
and set to 2. For example:
MRC p15,0,,c6,c0,2 ; Read CP15 Instruction Fault Address Register
MCR p15,0,,c6,c0,2 ; Write CP15 Instruction Fault Address Register
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