ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
MRC{2} , #, , , {, #}
where:
2 If specified, selects encoding T2 / A2. If omitted, selects encoding T1 / A1.
Instruction Details
See Standard assembler syntax fields on page A8-7. An ARM MRC2 instruction must be
unconditional.
The name of the coprocessor. The standard generic coprocessor names are p0, p1, …, p15.
Is a coprocessor-specific opcode in the range 0 to 7.
Is the destination ARM core register. This register can be R0-R14 or APSR_nzcv. The last
form writes bits [31:28] of the transferred value to the N, Z, C and V condition flags and is
specified by setting the Rt field of the encoding to 0b1111. In pre-UAL assembler syntax,
PC was written instead of APSR_nzcv to select this form.
Is the coprocessor register that contains the first operand.
Is an additional source or destination coprocessor register.
Is a coprocessor-specific opcode in the range 0 to 7. If omitted, is assumed to be 0.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
if !Coproc_Accepted(cp, ThisInstr()) then
GenerateCoprocessorException();
else
value = Coproc_GetOneWord(cp, ThisInstr());
if t != 15 then
R[t] = value;
else
APSR.N = value;
APSR.Z = value;
APSR.C = value;
APSR.V = value;
// value are not used.
Exceptions
Undefined Instruction.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-203