ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Common VFP Subarchitecture Specification
IDF, bit [7] Input Denormal trapped exception flag, or IMPLEMENTATION DEFINED. The meaning of this
bit depends on the value of FPEXC.TFV:
FPEXC.TFV == 0
This bit is IMPLEMENTATION DEFINED. It can contain IMPLEMENTATION DEFINED
information about the cause of an exception. It might be used by the
implementation to indicate why an instruction was bounced to support code.
FPEXC.TFV == 1
This bit is the Input Denormal trapped exception flag. It indicates whether an
Input Denormal exception occurred while FPSCR.IDE was 1.
In this case, the meaning of this bit is:
0 Input denormal exception has not occurred.
1 Input denormal exception has occurred.
Input Denormal exceptions can occur only when FPSCR.FZ is 1.
In both cases this bit must be cleared to 0 by the exception handling routine.
IXF, bit [4] Inexact trapped exception flag, or IMPLEMENTATION DEFINED. The meaning of this bit
depends on the value of FPEXC.TFV:
FPEXC.TFV == 0
This bit is IMPLEMENTATION DEFINED. It can contain IMPLEMENTATION DEFINED
information about the cause of an exception. It might be used by the
implementation to indicate why an instruction was bounced to support code.
FPEXC.TFV == 1
This bit is the Inexact trapped exception flag. It indicates whether an Inexact
exception occurred while FPSCR.IXE was 1.
In this case, the meaning of this bit is:
0 Inexact exception has not occurred.
1 Inexact exception has occurred.
In both cases this bit must be cleared to 0 by the exception handling routine.
UFF, bit [3] Underflow trapped exception flag, or IMPLEMENTATION DEFINED. The meaning of this bit
depends on the value of FPEXC.TFV:
FPEXC.TFV == 0
This bit is IMPLEMENTATION DEFINED. It can contain IMPLEMENTATION DEFINED
information about the cause of an exception. It might be used by the
implementation to indicate why an instruction was bounced to support code.
FPEXC.TFV == 1
This bit is the Underflow trapped exception flag. It indicates whether an
Underflow exception occurred while FPSCR.UFE was 1.
In this case, the meaning of this bit is:
0 Underflow exception has not occurred.
1 Underflow exception has occurred.
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