ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARMv4 and ARMv5 Differences
The TLB lock by entry model
When a new entry is written to the TLB as the result of a translation table walk following a TLB miss, the
Victim field of the appropriate TLB Lockdown Register is incremented. When the value of the Victim field
reaches the maximum number of TLB entries, the incremented Victim field wraps to the value of the Base
field.
The architecture permits a modified form of this where the Base field is fixed as zero. It is particularly
appropriate where an implementation provides dedicated lockable entries (unified or Harvard) as a separate
resource from the general TLB provision. To determine which form of the locking model is provided, write
the Base field with all bits nonzero, read it back and check whether it is a nonzero value.
TLB Lockdown Register format, for the lockdown by entry mechanism
The format of the CP15 register used for the lockdown by entry form is:
31 32-Wa 31-W 32-2W 31-2W 1 0
Base Victim Reserved P
a. W = log2(n), rounded up to an integer if necessary, where n is the number of TLB entries.
If the implementation has separate instruction and data TLBs, there are two variants of this register, selected
by the field of the MCR or MRC instruction used to access the CP15 c10 register:
== 0 Selects the data TLB lockdown register.
== 1 Selects the instruction TLB lockdown register.
If the implementation has a unified TLB, only one variant of this register exists, and must be zero.
CRm must be c0 for MCR and MRC instructions that access the CP15 c10 register.
Writing the appropriate TLB lockdown by entry register has the following effects:
The victim field specifies which TLB entry is replaced by the translation table walk result generated
by the next TLB miss.
The Base field constrains the TLB replacement strategy to only use the TLB entries numbered from
(Base) to ((number of TLB entries)-1), provided the victim field is already in that range.
Any translation table walk results written to TLB entries while P == 1 are protected from being
invalidated by the CP15 c8 invalidate entire TLB operations. Ones written while P == 0 are
invalidated normally by these operations.
Note
If the number of TLB entries is not a power of two, writing a value to either the Base or Victim fields that
is greater than or equal to the number of TLB entries has UNPREDICTABLE results.
Reading the appropriate TLB lockdown by entry register returns the last values written to the Base field and
the P bit, and the number of the next TLB entry to be replaced in the victim field.
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