ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

C10.4.2 Target to Host Data Transfer Register (DBGDTRTX)
Debug Registers Reference
d. If RXfull is 1, the values of DBGDTRRX, RXfull, and RXfull_l become UNKNOWN.
e. If DBGDSCR.SDABORT_l, the Sticky Synchronous Data Abort bit, is set to 1, the instruction is not issued:
InstrCompl and InstrCompl_l are unchanged
the values of DBGDTRRX, RXfull and RXfull_l become UNKNOWN.
For a description of the DBGDSCR.SDABORT_l bit, see Debug Status and Control Register (DBGDSCR) on
page C10-10.
Otherwise, the instruction is issued and InstrCompl and InstrCompl_l are cleared to 0.
The Target to Host Data Transfer Register, DBGDTRTX, is used by the ARM processor to transfer data to
an external host. For example it is used by a debug target to transfer data to the debugger.
The DBGDTRTX Register is:
Debug register 35, at offset 0x08C.
A component of the Debug Communication Channel (DCC).
Accessed through two views:
— DBGDTRTXint, the internal view
— DBGDTRTXext, the external view.
See Internal and external views of the DBGDSCR and the DCC registers on page C6-21 for
definitions of the internal and external views.
When the Security Extensions are implemented, a Common register.
The behavior of accesses to the DBGDTRTX Register depends on:
which view is being accessed
the values of flags in the DCC.
For more information, see Access to the DBGDTRTX Register on page C10-44.
The architectural status of the DBGDTRRX Register depends on the Debug architecture version:
ARMv6 DBGDTRTX was previously named wDTR. DBGDTRTXext is not defined in ARMv6.
However, the DBGDTRTXext functionality must be implemented as part of the external
debug interface.
v7 Debug If implemented, the Extended CP14 interface instructions that access DBGDTRTXext are
UNPREDICTABLE in Debug state. For more information, see Internal and external views of
the DBGDSCR and the DCC registers on page C6-21 and Extended CP14 interface on
page C6-33.
The format of the DBGDTRTX Register is:
31 0
Target to host data
Target to host data, bits [31:0]
One word of data for transfer from the debug target to the debug host.
The debug logic reset value of the DBGDTRTX Register is UNKNOWN.
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