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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Glossary<br />

Abort Is caused by an illegal memory access. Aborts can be caused by the external memory system or the MMU<br />

or MPU.<br />

Abort model<br />

Describes what happens to the processor state when a Data Abort exception occurs. Different abort models<br />

behave differently with regard to load/store instructions that specify base register write-back. For more<br />

details, see Effects of data-aborted instructions on page B1-57.<br />

Addressing mode<br />

Means a method for generating the memory address used by a load/store instruction.<br />

Advanced SIMD<br />

Is an extension to the <strong>ARM</strong> architecture that provides SIMD operations on a bank of extension registers. If<br />

the VFP extension is also implemented, the two extensions share the register bank <strong>and</strong> the SIMD operations<br />

include single-precision floating-point SIMD operations.<br />

Aligned Refers to data items stored in such a way that their address is divisible by the highest power of 2 that divides<br />

their size. Aligned halfwords, words <strong>and</strong> doublewords therefore have addresses that are divisible by 2, 4 <strong>and</strong><br />

8 respectively.<br />

An aligned access is one where the address of the access is aligned to the size of an element of the access<br />

<strong>ARM</strong> instruction<br />

Is a word that specifies an operation for a processor in <strong>ARM</strong> state to perform. <strong>ARM</strong> instructions must be<br />

word-aligned.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. Glossary-1

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