ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.297 VCVT (between floating-point and fixed-point, VFP)
This instruction converts a value in a register from floating-point to fixed-point, or from fixed-point to
floating-point, and places the result in a second register. You can specify the fixed-point value as either
signed or unsigned.
The floating-point value can be single-precision or double-precision.
The fixed-point value can be 16-bit or 32-bit. Conversions from fixed-point values take their operand from
the low-order bits of the source register and ignore any remaining bits. Signed conversions to fixed-point
values sign-extend the result value to the destination register width. Unsigned conversions to fixed-point
values zero-extend the result value to the destination register width.
The floating-point to fixed-point operation uses the Round towards Zero rounding mode. The fixed-point to
floating-point operation uses the Round to Nearest rounding mode.
Encoding T1 / A1 VFPv3 (sf = 1 UNDEFINED in single-precision only variants)
VCVT..F64 , , #
VCVT..F32 , , #
VCVT.F64. , , #
VCVT.F32. , , #
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 0 1 1 1 0 1 D 1 1 1 op 1 U Vd 1 0 1 sf sx 1 i 0 imm4
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 1 1 1 0 1 D 1 1 1 op 1 U Vd 1 0 1 sf sx 1 i 0 imm4
to_fixed = (op == ‘1’); dp_operation = (sf == ‘1’); unsigned = (U == ‘1’);
size = if sx == ‘0’ then 16 else 32;
frac_bits = size - UInt(imm4:i);
if to_fixed then
round_zero = TRUE;
else
round_nearest = TRUE;
d = if dp_operation then UInt(D:Vd) else UInt(Vd:D);
if frac_bits < 0 then UNPREDICTABLE;
A8-582 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B