ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Thumb Instruction Set Encoding
A6.3.1 Data-processing (modified immediate)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 0 0 op S Rn 0 Rd
Table A6-10 shows the allocation of encodings in this space. Other encodings in this space are UNDEFINED.
In the Rn, Rd and S columns, - indicates that the field value of the field does affect the decoding.
These encodings are all available in ARMv6T2 and above.
Table A6-10 32-bit modified immediate data-processing instructions
op Rn Rd S Instruction See
0000 - not 1111 x Bitwise AND AND (immediate) on page A8-34
- 1111 0 UNPREDICTABLE -
- 1111 1 Test TST (immediate) on page A8-454
0001 - - - Bitwise Bit Clear BIC (immediate) on page A8-50
0010 not 1111 - - Bitwise OR ORR (immediate) on page A8-228
1111 - - Move MOV (immediate) on page A8-194
0011 not 1111 - - Bitwise OR NOT ORN (immediate) on page A8-224
1111 - - Bitwise NOT MVN (immediate) on page A8-214
0100 - not 1111 x Bitwise Exclusive OR EOR (immediate) on page A8-94
1111 0 UNPREDICTABLE -
1 Test Equivalence TEQ (immediate) on page A8-448
1000 - not 1111 - Add ADD (immediate, Thumb) on page A8-20
1111 0 UNPREDICTABLE -
1 Compare Negative CMN (immediate) on page A8-74
1010 - - - Add with Carry ADC (immediate) on page A8-14
1011 - - - Subtract with Carry SBC (immediate) on page A8-302
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A6-15