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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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A9.4.5 STRH (register)<br />

ThumbEE<br />

Store Register Halfword (register) calculates an address from a base register value <strong>and</strong> an offset register<br />

value, <strong>and</strong> stores a halfword from a register to memory. The offset register value is shifted left by 1 bit. For<br />

information about memory accesses see Memory accesses on page A8-13.<br />

The similar Thumb instruction does not have a left shift.<br />

Encoding T1 ThumbEE<br />

STRH ,[,, LSL #1]<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

0 1 0 1 0 0 1 Rm Rn Rt<br />

t = UInt(Rt); n = UInt(Rn); m = UInt(Rm);<br />

Assembler syntax<br />

STRH , [, , LSL #1]<br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

The source register.<br />

The base register.<br />

Contains the offset that is shifted <strong>and</strong> applied to the value of to form the address.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations(); NullCheckIfThumbEE(n);<br />

address = R[n] + LSL(R[m],1);<br />

MemU[address,2] = R[t];<br />

Exceptions <strong>and</strong> checks<br />

Data Abort, NullCheck.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A9-13

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