05.02.2013 Views

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Instruction Details<br />

A8.6.190 STMDA / STMED<br />

Store Multiple Decrement After (Store Multiple Empty Descending) stores multiple registers to consecutive<br />

memory locations using an address from a base register. The consecutive memory locations end at this<br />

address, <strong>and</strong> the address just below the lowest of those locations can optionally be written back to the base<br />

register.<br />

For details of related system instructions see STM (user registers) on page B6-22.<br />

Encoding A1 <strong>ARM</strong>v4*, <strong>ARM</strong>v5T*, <strong>ARM</strong>v6*, <strong>ARM</strong>v7<br />

STMDA {!},<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

cond 1 0 0 0 0 0 W 0 Rn register_list<br />

n = UInt(Rn); registers = register_list; wback = (W == ‘1’);<br />

if n == 15 || BitCount(registers) < 1 then UNPREDICTABLE;<br />

A8-376 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!