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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

The label of the literal data item that is to be loaded into . The assembler calculates the<br />

required value of the offset from the Align(PC,4) value of this instruction to the label.<br />

Permitted values of the offset are:<br />

Encoding T1 multiples of four in the range -1020 to 1020<br />

Encoding T2 or A1 any value in the range -4095 to 4095.<br />

If the offset is zero or positive, imm32 is equal to the offset <strong>and</strong> add == TRUE.<br />

If the offset is negative, imm32 is equal to minus the offset <strong>and</strong> add == FALSE. Negative offset<br />

is not available in encoding T1.<br />

Note<br />

In code examples in this manual, the syntax = is used for the label of a memory word<br />

whose contents are constant <strong>and</strong> equal to . The actual syntax for such a label is<br />

assembler-dependent.<br />

The alternative syntax permits the addition or subtraction of the offset <strong>and</strong> the immediate offset to be<br />

specified separately, including permitting a subtraction of 0 that cannot be specified using the normal<br />

syntax. For more information, see Use of labels in UAL instruction syntax on page A4-5.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations(); NullCheckIfThumbEE(15);<br />

base = Align(PC,4);<br />

address = if add then (base + imm32) else (base - imm32);<br />

data = MemU[address,4];<br />

if t == 15 then<br />

if address == ‘00’ then LoadWritePC(data); else UNPREDICTABLE;<br />

elsif UnalignedSupport() || address = ‘00’ then<br />

R[t] = data;<br />

else // Can only apply before <strong>ARM</strong>v7<br />

if CurrentInstrSet() == InstrSet_<strong>ARM</strong> then<br />

R[t] = ROR(data, 8*UInt(address));<br />

else<br />

R[t] = bits(32) UNKNOWN;<br />

Exceptions<br />

Data Abort.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-123

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