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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.165 SMC (previously SMI)<br />

Secure Monitor Call is a system instruction. For details see SMC (previously SMI) on page B6-18.<br />

A8.6.166 SMLABB, SMLABT, SMLATB, SMLATT<br />

Signed Multiply Accumulate (halfwords) performs a signed multiply-accumulate operation. The multiply<br />

acts on two signed 16-bit quantities, taken from either the bottom or the top half of their respective source<br />

registers. The other halves of these source registers are ignored. The 32-bit product is added to a 32-bit<br />

accumulate value <strong>and</strong> the result is written to the destination register.<br />

If overflow occurs during the addition of the accumulate value, the instruction sets the Q flag in the APSR.<br />

It is not possible for overflow to occur during the multiplication.<br />

Encoding T1 <strong>ARM</strong>v6T2, <strong>ARM</strong>v7<br />

SMLA ,,,<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 1 0 1 1 0 0 0 1 Rn Ra Rd 0 0 N M Rm<br />

if Ra == ‘1111’ then SEE SMULBB, SMULBT, SMULTB, SMULTT;<br />

d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); a = UInt(Ra);<br />

n_high = (N == ‘1’); m_high = (M == ‘1’);<br />

if BadReg(d) || BadReg(n) || BadReg(m) || a == 13 then UNPREDICTABLE;<br />

Encoding A1 <strong>ARM</strong>v5TE*, <strong>ARM</strong>v6*, <strong>ARM</strong>v7<br />

SMLA ,,,<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

cond 0 0 0 1 0 0 0 0 Rd Ra Rm 1 M N 0 Rn<br />

d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); a = UInt(Ra);<br />

n_high = (N == ‘1’); m_high = (M == ‘1’);<br />

if d == 15 || n == 15 || m == 15 || a == 15 then UNPREDICTABLE;<br />

A8-330 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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