ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.404 VSUBL, VSUBW
Vector Subtract Long subtracts the elements of one doubleword vector from the corresponding elements of
another doubleword vector, and places the results in a quadword vector. Before subtracting, it sign-extends
or zero-extends the elements of both operands.
Vector Subtract Wide subtracts the elements of a doubleword vector from the corresponding elements of a
quadword vector, and places the results in another quadword vector. Before subtracting, it sign-extends or
zero-extends the elements of the doubleword operand.
Encoding T1 / A1 Advanced SIMD
VSUBL. , ,
VSUBW. {,} ,
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 U 1 1 1 1 1 D size Vn Vd 0 0 1 op N 0 M 0 Vm
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 0 0 1 U 1 D size Vn Vd 0 0 1 op N 0 M 0 Vm
if size == ‘11’ then SEE “Related encodings”;
if Vd == ‘1’ || (op == ‘1’ && Vn == ‘1’) then UNDEFINED;
esize = 8