ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
Instruction Details
ADD{S} {,} , # All encodings permitted
ADDW {,} , # Only encoding T4 permitted
where:
S If S is present, the instruction updates the flags. Otherwise, the flags are not updated.
See Standard assembler syntax fields on page A8-7.
The destination register.
The first operand register. If is SP, see ADD (SP plus immediate) on page A8-28. If
is PC, see ADR on page A8-32.
The immediate value to be added to the value obtained from . The range of values is 0-7
for encoding T1, 0-255 for encoding T2 and 0-4095 for encoding T4. See Modified
immediate constants in Thumb instructions on page A6-17 for the range of values for
encoding T3.
When multiple encodings of the same length are available for an instruction, encoding T3 is preferred to
encoding T4 (if encoding T4 is required, use the ADDW syntax). Encoding T1 is preferred to encoding T2 if
is specified and encoding T2 is preferred to encoding T1 if is omitted.
The pre-UAL syntax ADDS is equivalent to ADDS.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
(result, carry, overflow) = AddWithCarry(R[n], imm32, ‘0’);
R[d] = result;
if setflags then
APSR.N = result;
APSR.Z = IsZeroBit(result);
APSR.C = carry;
APSR.V = overflow;
Exceptions
None.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-21