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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.201 STRD (register)<br />

Store Register Dual (register) calculates an address from a base register value <strong>and</strong> a register offset, <strong>and</strong> stores<br />

two words from two registers to memory. It can use offset, post-indexed, or pre-indexed addressing. For<br />

information about memory accesses see Memory accesses on page A8-13.<br />

Encoding A1 <strong>ARM</strong>v5TE*, <strong>ARM</strong>v6*, <strong>ARM</strong>v7<br />

STRD ,,[,+/-]{!}<br />

STRD ,,[],+/-<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

cond 0 0 0 P U 0 W 0 Rn Rt (0)(0)(0)(0) 1 1 1 1 Rm<br />

if Rt == ‘1’ then UNDEFINED;<br />

t = UInt(Rt); t2 = t+1; n = UInt(Rn); m = UInt(Rm);<br />

index = (P == ‘1’); add = (U == ‘1’); wback = (P == ‘0’) || (W == ‘1’);<br />

if P == ‘0’ && W == ‘1’ then UNPREDICTABLE;<br />

if t2 == 15 || m == 15 then UNPREDICTABLE;<br />

if wback && (n == 15 || n == t || n == t2) then UNPREDICTABLE;<br />

if ArchVersion() < 6 && wback && m == n then UNPREDICTABLE;<br />

A8-398 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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