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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Assembler syntax<br />

CDP{2} , #, , , {,#}<br />

where:<br />

2 If specified, selects encoding T2 / A2. If omitted, selects encoding T1 / A1.<br />

Instruction Details<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7. An <strong>ARM</strong> CDP2 instruction must be<br />

unconditional.<br />

The name of the coprocessor, <strong>and</strong> causes the corresponding coprocessor number to be<br />

placed in the cp_num field of the instruction. The st<strong>and</strong>ard generic coprocessor names are<br />

p0, p1, …, p15.<br />

Is a coprocessor-specific opcode, in the range 0 to 15.<br />

The destination coprocessor register for the instruction.<br />

The coprocessor register that contains the first oper<strong>and</strong>.<br />

The coprocessor register that contains the second oper<strong>and</strong>.<br />

Is a coprocessor-specific opcode in the range 0 to 7. If it is omitted, is 0.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations();<br />

if !Coproc_Accepted(cp, ThisInstr()) then<br />

GenerateCoprocessorException();<br />

else<br />

Coproc_InternalOperation(cp, ThisInstr());<br />

Exceptions<br />

Undefined Instruction.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-69

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