ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
TBB [, ]
TBH [, , LSL #1]
where:
See Standard assembler syntax fields on page A8-7.
Instruction Details
The base register. This contains the address of the table of branch lengths. The PC can be
used. If it is, the table immediately follows this instruction.
The index register.
For TBB, this contains an integer pointing to a single byte in the table. The offset in the table
is the value of the index.
For TBH, this contains an integer pointing to a halfword in the table. The offset in the table is
twice the value of the index.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); NullCheckIfThumbEE(n);
if is_tbh then
halfwords = UInt(MemU[R[n]+LSL(R[m],1), 2]);
else
halfwords = UInt(MemU[R[n]+R[m], 1]);
BranchWritePC(PC + 2*halfwords);
Exceptions
Data Abort.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-447