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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Assembler syntax<br />

STRBT , [ {, #}] Offset: Thumb only<br />

STRBT , [] {, #} Post-indexed: <strong>ARM</strong> only<br />

STRBT , [], +/- {, } Post-indexed: <strong>ARM</strong> only<br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

The source register.<br />

The base register. The SP can be used.<br />

Instruction Details<br />

+/- Is + or omitted if or the optionally shifted value of is to be added to the base<br />

register value (add == TRUE), or – if it is to be subtracted (permitted in <strong>ARM</strong> code only,<br />

add == FALSE).<br />

The immediate offset applied to the value of . Values are 0-255 for encoding T1, <strong>and</strong><br />

0-4095 for encoding A1. can be omitted, meaning an offset of 0.<br />

Contains the offset that is optionally shifted <strong>and</strong> added to the value of to form the<br />

address.<br />

The shift to apply to the value read from . If omitted, no shift is applied. Shifts applied<br />

to a register on page A8-10 describes the shifts <strong>and</strong> how they are encoded.<br />

The pre-UAL syntax STRBT is equivalent to STRBT.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations(); NullCheckIfThumbEE(n);<br />

offset = if register_form then Shift(R[m], shift_t, shift_n, APSR.C) else imm32;<br />

offset_addr = if add then (R[n] + offset) else (R[n] - offset);<br />

address = if postindex then R[n] else offset_addr;<br />

MemU_unpriv[address,1] = R[t];<br />

if postindex then R[n] = offset_addr;<br />

Exceptions<br />

Data Abort.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-395

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