ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

The System Level Programmers’ Model
The LR value on entry to the interrupt handler must be (address of the current bytecode
instruction) + 4.
Corrective action is taken either:
— directly by the Jazelle extension hardware
— indirectly, by calling a SUBARCHITECTURE DEFINED handler in the EJVM.
The corrective action must re-create a situation where the bytecode instruction can be re-executed
from its start.
The LR value on entry to the interrupt handler must be (address of the interrupted bytecode
instruction) + 4.
Data Abort exceptions
On taking a Data Abort exception, the value saved in LR_abt must ensure that the Data Abort handler can:
read the CP15 Fault Status and Fault Address registers
fix the reason for the abort
return using SUBS PC,LR,#8 or its equivalent.
The abort handler must be able to do this without looking at the instruction that caused the abort or which
instruction set state it was executed in. On an ARMv7-A implementation, the abort handler must take
account of the virtual memory system.
Note
This assumes that the intention is to return to and retry the bytecode instruction that caused the Data
Abort exception. If the intention is instead to return to the bytecode instruction after the one that
caused the abort, then the return address must be modified by the length of the bytecode instruction
that caused the abort.
For details of the CP15 Fault Status and Fault Address:
— for a VMSA implementation, see CP15 c5, Fault status registers on page B3-121 and CP15
c6, Fault Address registers on page B3-124
— for a PMSA implementation, see CP15 c5, Fault status registers on page B4-54 and CP15 c6,
Fault Address registers on page B4-57.
To enable the standard mechanism for handling Data Abort exceptions to work correctly, a Jazelle hardware
implementation must ensure that one of the following applies at any point where a bytecode instruction can
generate a Data Abort exception:
The sequence of operations performed from the start of execution of the bytecode instruction, up to
the point where the Data Abort exception is generated, is idempotent. This means that the sequence
can be repeated from its start without changing the overall result of executing the bytecode
instruction.
If the Data Abort exception is generated during execution of a bytecode instruction, corrective action
is taken either:
— directly by the Jazelle extension hardware
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