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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Protected Memory System <strong>Architecture</strong> (PMSA)<br />

B4.1 About the PMSA<br />

The PMSA is based on a Memory Protection Unit (MPU). The PMSA provides a much simpler memory<br />

protection scheme than the MMU based VMSA described in Chapter B3 Virtual Memory System<br />

<strong>Architecture</strong> (VMSA). The simplification applies to both the hardware <strong>and</strong> the software. A PMSAv7<br />

processor is identified by the presence of the MPU Type Register, see c0, MPU Type Register (MPUIR) on<br />

page B4-36.<br />

The main simplification is that the MPU does not use translation tables. Instead, System Control<br />

Coprocessor (CP15) registers are used to define protection regions. The protection regions eliminate the<br />

need for:<br />

hardware to perform translation table walks<br />

software to set up <strong>and</strong> maintain the translation tables.<br />

The use of protection regions has the benefit of making the memory checking fully deterministic. However,<br />

the level of control is region based rather than page based, meaning the control is considerably less<br />

fine-grained than in the VMSA.<br />

A second simplification is that the PMSA does not support virtual to physical address mapping other than<br />

flat address mapping. The physical memory address accessed is the same as the virtual address generated<br />

by the processor.<br />

B4.1.1 Protection regions<br />

In a PMSA implementation, you can use CP15 registers to define protection regions in the physical memory<br />

map. When describing a PMSA implementation, protection regions are often referred to as regions.<br />

This means the PMSA has the following features:<br />

For each defined region, CP15 registers specify:<br />

— the region size<br />

— the base address<br />

— the memory attributes, for example, memory type <strong>and</strong> access permissions.<br />

Regions of 256 bytes or larger can be split into 8 sub-regions for improved granularity of memory<br />

access control.<br />

The minimum region size supported is IMPLEMENTATION DEFINED.<br />

Memory region control, requiring read <strong>and</strong> write access to the region configuration registers, is<br />

possible only from privileged modes.<br />

Regions can overlap. If an address is defined in multiple regions, a fixed priority scheme is used to<br />

define the properties of the address being accessed. This scheme gives priority to the region with the<br />

highest region number.<br />

The PMSA can be configured so that an access to an address that is not defined in any region either:<br />

— causes a memory abort<br />

— if it is a privileged access, uses the default memory map.<br />

B4-2 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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