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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Assembler syntax<br />

VSQRT.F64 , Encoded as sz = 1<br />

VSQRT.F32 , Encoded as sz = 0<br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

, The destination vector <strong>and</strong> the oper<strong>and</strong> vector, for a double-precision operation.<br />

, The destination vector <strong>and</strong> the oper<strong>and</strong> vector, for a single-precision operation.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations(); CheckVFPEnabled(TRUE);<br />

if dp_operation then<br />

D[d] = FPSqrt(D[m]);<br />

else<br />

S[d] = FPSqrt(S[m]);<br />

Exceptions<br />

Undefined Instruction.<br />

Floating-point exceptions: Invalid Operation, Inexact, Input Denormal.<br />

Instruction Details<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-763

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