ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
SXTAH {,} , {, }
where:
See Standard assembler syntax fields on page A8-7.
The destination register.
The first operand register.
The second operand register.
This can be any one of:
omitted encoded as rotate = ’00’
ROR #8 encoded as rotate = ’01’
ROR #16 encoded as rotate = ’10’
ROR #24 encoded as rotate = ’11’.
Operation
Note
Instruction Details
An assembler can permit ROR #0 to mean the same thing as omitting the rotation, possibly
with restrictions on the permitted encodings, but this is not standard UAL and must not be
used for disassembly.
if ConditionPassed() then
EncodingSpecificOperations();
rotated = ROR(R[m], rotation);
R[d] = R[n] + SignExtend(rotated, 32);
Exceptions
None.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-439