ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Virtual Memory System Architecture (VMSA)
— The operation generates an IMPLEMENTATION DEFINED Data Abort exception if it operates on
an entry that is locked down, or might be locked down. A fault status code is provided in the
CP15 c5 fault status registers for cache and TLB lockdown faults, see Table B3-11 on
page B3-50 and Table B3-12 on page B3-51.
Any implementation that uses an abort mechanism for entries that might be locked must:
document the IMPLEMENTATION DEFINED code sequences that then performs the required operations
on entries that are not locked down
implement one of the other specified alternatives for the locked entries.
ARM recommends that architecturally-defined operations are used wherever possible in such sequences, to
minimize the number of customized operations required.
In addition, if an implementation uses an abort mechanisms for entries that might be locked it must also must
provide a mechanism that ensures that no TLB entries are locked.
Similar rules apply to cache lockdown, see The interaction of cache lockdown with cache maintenance on
page B2-18.
An unlocked entry in the TLB is not guaranteed to remain in the TLB. This means that, as a side effect of a
TLB maintenance operation, any unlocked entry in the TLB might be invalidated.
The effect of the Security Extensions on the TLB maintenance operations
If an implementation includes the Security Extensions, the TLB maintenance operations must take account
of the current security state. Table B3-13 summarizes how the Security Extensions affect these operations.
Table B3-13 TLB maintenance operations when the Security Extensions are implemented
TLB maintenance operation TLB entries guaranteed to be invalidated
Invalidate all entries All TLB entries accessible in the current security state.
Invalidate single entry by MVA Targeted TLB entry, only if all of these apply:
the MVA value matches
the ASID value matches, for a non-global entry
the entry applies to the current security state.
Invalidate entries by ASID match All non-global TLB entries for which both:
the ASID value matches
the entry applies to the current security state.
Invalidate entries by MVA, all ASID All targeted TLB entries for which both:
the MVA value matches
the entry applies to the current security state.
B3-58 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B