ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.202 STREX
Store Register Exclusive calculates an address from a base register value and an immediate offset, and stores
a word from a register to memory if the executing processor has exclusive access to the memory addressed.
For more information about support for shared memory see Synchronization and semaphores on
page A3-12. For information about memory accesses see Memory accesses on page A8-13.
Encoding T1 ARMv6T2, ARMv7
STREX ,,[{,#}]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 0 1 0 0 0 0 1 0 0 Rn Rt Rd imm8
d = UInt(Rd); t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm8:’00’, 32);
if BadReg(d) || BadReg(t) || n == 15 then UNPREDICTABLE;
if d == n || d == t then UNPREDICTABLE;
Encoding A1 ARMv6*, ARMv7
STREX ,,[]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 0 0 1 1 0 0 0 Rn Rd (1)(1)(1)(1) 1 0 0 1 Rt
d = UInt(Rd); t = UInt(Rt); n = UInt(Rn); imm32 = Zeros(32); // Zero offset
if d == 15 || t == 15 || n == 15 then UNPREDICTABLE;
if d == n || d == t then UNPREDICTABLE;
A8-400 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B