ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Virtual Memory System Architecture (VMSA)
First-level descriptors
Each entry in the first-level table is a descriptor of how the associated 1MB MVA range is mapped.
Table B3-1 shows the possible first-level descriptor formats, where the value of bits [1:0] of the descriptor
identifies the descriptor type:
0b00 Invalid or fault entry. The associated MVA is unmapped, and attempting to access it
generates a Translation fault, see VMSA memory aborts on page B3-40. Software can use
bits [31:2] of an invalid descriptor for its own purposes, because these bits are ignored by
the hardware.
0b01 Page table descriptor. The descriptor gives the physical address of a second-level translation
table, that specifies how the associated 1MByte MVA range is mapped. A second level
translation table requires 1KByte of memory and can map Large pages and Small pages, see
Second-level descriptors on page B3-10.
0b10 Section or Supersection descriptor for the associated MVA. Bit [18] determines whether the
descriptor is of a Section or a Supersection. For details of how the descriptor is interpreted
see The full translation flow for Sections, Supersections, Small pages and Large pages on
page B3-15.
0b11 Reserved. In VMSAv7, descriptors with bits [1:0] == 0b11 generate Translation faults, and
must not be used.
Table B3-1 VMSAv7 first-level descriptor formats
31 24 23 20 19 18 17 16 15 14 12 11 10 9 8 5 4 3 2 1 0
Fault IGNORE 0 0
Page table Page table base address, bits [31:10]
Section Section base address, PA[31:20]
Supersection
Supersection base address
PA[31:24]
Extended
base address
PA[35:32]
N
S
N
S
n
0
G S
A
P
[2]
n
1
G S
A
P
[2]
TEX
[2:0]
TEX
[2:0]
AP
[1:0]
AP
[1:0]
The address information in the first-level descriptors is:
Page table Bits [31:10] of the descriptor are bits [31:10] of the physical address of a Page table.
Section Bits [31:20] of the descriptor are bits [31:20] of the physical address of the Section.
Supersection Bits [31:24] of the descriptor are bits [31:24] of the physical address of the Supersection.
Optionally, bits [8:5,23:20] of the descriptor are bits [39:32] of the extended Supersection
address.
B3-8 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B
I
M
P
I
M
P
I
M
P
Domain
S
B
Z
Domain X
N
Extended
X
base address
N
PA[39:36]
N
S
S
B
Z
0 1
C B 1 0
C B 1 0
Reserved Reserved 1 1