ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Protected Memory System Architecture (PMSA)
Memory region numbering starts at 0 and goes up to one less than the number of regions
supported.
Writing a value to this register that is greater than or equal to the number of memory regions supported has
UNPREDICTABLE results.
In the context of the RGNR description, when the MPU implements separate Data and Instruction address
maps the Number of memory regions supported is the greater of:
number of Data memory regions supported
number of Instruction memory regions supported.
Accessing the RGNR
To access the RGNR you read or write the CP15 registers with set to 0, set to c6, set to
c2, and set to 0. For example:
MRC p15,0,,c6,c2,0 ; Read CP15 MPU Region Number Register
MCR p15,0,,c6,c2,0 ; Write CP15 MPU Region Number Register
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