ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
where:
Instruction Details
SUB{S} {,} SP, # All encodings permitted
SUBW {,} SP, # Only encoding T3 permitted
S If S is present, the instruction updates the flags. Otherwise, the flags are not updated.
See Standard assembler syntax fields on page A8-7.
The destination register. If omitted, is SP.
The immediate value to be subtracted from the value obtained from SP. Values are multiples
of 4 in the range 0-508 for encoding T1 and any value in the range 0-4095 for encoding T3.
See Modified immediate constants in Thumb instructions on page A6-17 or Modified
immediate constants in ARM instructions on page A5-9 for the range of values for
encodings T2 and A1.
When both 32-bit encodings are available for an instruction, encoding T2 is preferred to
encoding T3 (if encoding T3 is required, use the SUBW syntax).
The pre-UAL syntax SUBS is equivalent to SUBS.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
(result, carry, overflow) = AddWithCarry(SP, NOT(imm32), ‘1’);
if d == 15 then // Can only occur for ARM encoding
ALUWritePC(result); // setflags is always FALSE here
else
R[d] = result;
if setflags then
APSR.N = result;
APSR.Z = IsZeroBit(result);
APSR.C = carry;
APSR.V = overflow;
Exceptions
None.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-427