ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.1.4 Assembler syntax
Encoding-specific pseudocode. This is pseudocode that translates the encoding-specific instruction
fields into inputs to the encoding-independent pseudocode in the later Operation subsection, and that
picks out any special cases in the encoding. For a detailed description of the pseudocode used and of
the relationship between the encoding diagram, the encoding-specific pseudocode and the
encoding-independent pseudocode, see Appendix I Pseudocode Definition.
The Assembly syntax subsection describes the standard UAL syntax for the instruction.
Each syntax description consists of the following elements:
One or more syntax prototype lines written in a typewriter font, using the conventions described in
Assembler syntax prototype line conventions on page A8-5. Each prototype line documents the
mnemonic and (where appropriate) operand parts of a full line of assembler code. When there is more
than one such line, each prototype line is annotated to indicate required results of the
encoding-specific pseudocode. For each instruction encoding, this information can be used to
determine whether any instructions matching that encoding are available when assembling that
syntax, and if so, which ones.
The line where: followed by descriptions of all of the variable or optional fields of the prototype
syntax line.
Some syntax fields are standardized across all or most instructions. Standard assembler syntax fields
on page A8-7 describes these fields.
By default, syntax fields that specify registers, such as , , or , can be any of R0-R12 or
LR in Thumb instructions, and any of R0-R12, SP or LR in ARM instructions. These require that the
encoding-specific pseudocode set the corresponding integer variable (such as d, n, or t) to the
corresponding register number (0-12 for R0-R12, 13 for SP, 14 for LR). This can normally be done
by setting the corresponding bitfield in the instruction (named Rd, Rn, Rt…) to the binary encoding
of that number. In the case of 16-bit Thumb encodings, this bitfield is normally of length 3 and so the
encoding is only available when one of R0-R7 is specified in the assembler syntax. It is also common
for such encodings to use a bitfield name such as Rdn. This indicates that the encoding is only
available if and specify the same register, and that the register number of that register is
encoded in the bitfield if they do.
The description of a syntax field that specifies a register sometimes extends or restricts the permitted
range of registers or documents other differences from the default rules for such fields. Typical
extensions are to permit the use of the SP in Thumb instructions and to permit the use of the PC (using
register number 15).
Where appropriate, text that briefly describes changes from the pre-UAL ARM assembler syntax.
Where present, this usually consists of an alternative pre-UAL form of the assembler mnemonic. The
pre-UAL ARM assembler syntax does not conflict with UAL, and support for it is a recommended
optional extension to UAL, to enable the assembly of pre-UAL ARM assembler source files.
A8-4 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B