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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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C3.5 Debug event prioritization<br />

Debug events can be synchronous or asynchronous:<br />

Debug Events<br />

Breakpoint, Vector Catch, BKPT Instruction, <strong>and</strong> synchronous Watchpoint debug events are all<br />

synchronous debug events<br />

asynchronous Watchpoints <strong>and</strong> all Halting debug events are all asynchronous debug events.<br />

A single instruction can generate a number of synchronous debug events. It can also generate a number of<br />

synchronous exceptions. The principles given in Exception priority order on page B1-33 apply to those<br />

exceptions <strong>and</strong> debug events, in addition to the following:<br />

An instruction fetch that generates an MMU fault, MPU fault, or external abort does not generate a<br />

Breakpoint or Vector Catch debug event.<br />

Breakpoint <strong>and</strong> Vector Catch debug events are associated with the instruction <strong>and</strong> are taken before<br />

the instruction executes. Therefore, when a Breakpoint or Vector Catch debug event occurs no other<br />

synchronous exception or debug event that would have occurred as a result of executing the<br />

instruction is generated.<br />

If a single instruction has more than one of the following debug events associated with it, it is<br />

UNPREDICTABLE which is taken:<br />

— Breakpoint<br />

— Vector Catch.<br />

No instruction is valid if it has a Prefetch Abort exception associated with it. Therefore, if an<br />

instruction causes a Prefetch Abort exception no other synchronous exception or debug event that<br />

would have occurred as a result of executing the instruction is generated.<br />

An instruction that generates an Undefined Instruction exception does not cause any memory access,<br />

<strong>and</strong> therefore cannot cause a Data Abort exception or a Watchpoint debug event.<br />

A memory access that generates an MMU fault or an MPU fault must not generate a Watchpoint<br />

debug event.<br />

A memory access that generates an MMU fault, an MPU fault, or a synchronous Watchpoint debug<br />

event must not generate an external abort.<br />

All other synchronous exceptions <strong>and</strong> synchronous debug events are mutually exclusive, <strong>and</strong> are<br />

derived from a decode of the instruction.<br />

The <strong>ARM</strong> architecture does not define when asynchronous debug events other than asynchronous<br />

Watchpoint debug events are taken. Therefore the prioritization of asynchronous debug events other than<br />

asynchronous Watchpoint debug events is IMPLEMENTATION DEFINED.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. C3-43

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