ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Debug Registers Reference
Bit [8], v6 Debug only
For more information, see Exceptions in Debug state on page C5-20.
Reserved, UNK/SBZP.
ADABORT_l, bit [7], v7 Debug
Sticky Asynchronous Data Abort bit. This flag is set to 1 by any asynchronous abort that
occurs when the processor is in Debug state and is discarded because the ADAdiscard bit,
bit [19], is set to 1. The possible values of this bit are:
0 No asynchronous abort has been discarded since the last time this bit was
cleared to 0
1 An asynchronous abort has been discarded since the last time this bit was
cleared to 0.
This flag is cleared to 0 only by writing to bit [2] of the DBGDRCR, see Debug Run Control
Register (DBGDRCR), v7 Debug only on page C10-29.
Leaving Debug state with this flag set to 1 causes UNPREDICTABLE behavior.
When the processor is in Non-debug state this flag is never set to 1 when an asynchronous
abort occurs.
For more information, see Asynchronous aborts and entry to Debug state on page C5-5 and
Exceptions in Debug state on page C5-20.
ADABORT_l, bit [7], v6 Debug and v6.1 Debug
Sticky Asynchronous Data Abort bit. This flag is set to 1 by any asynchronous abort that
occurs when the processor is in Debug state. The possible values of this bit are:
0 No asynchronous abort has occurred since the last time this bit was cleared to 0
1 An asynchronous abort has occurred since the last time this bit was cleared to 0.
This flag is cleared to 0 when the external debugger reads the DBGDSCR.
Some aspects of the behavior of this flag depend on the version of the Debug architecture:
v6.1 Debug
If the processor is in Non-debug state this flag is not set to 1 on an asynchronous
abort.
v6 Debug The value of this flag is UNKNOWN when either the processor is in Non-debug
state, or the ITRen bit, bit [13], is not set to 1.
For more information, see Asynchronous aborts and entry to Debug state on page C5-5 and
Exceptions in Debug state on page C5-20.
C10-18 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B